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PDF资料 > N16D1633LPAT2-75I PDF资料
N16D1633LPAT2-75I
型号：N16D1633LPAT2-75I
描述：512K ? 16 Bits ? 2 Banks Low Power Synchronous DRAM
厂商：NANOAMP [NanoAmp Solutions, Inc.]
下载PDF
PDF大小：668.76 K
页数：27 页
| 型号 | 供应商 | 数量 | 厂商/品牌 | 封装 | 批号 | 说明 | 联系 |
|---|---|---|---|---|---|---|---|
|
N16D1633LPAC2-10I
|
|
1000 | ENABLE | - | 11+ | - |
|
|
N16D1633LPAC2-10I
|
|
1000 | ENABLE | - | 11+ | - |
|
|
N16D1633LPAC2-60C
|
|
1000 | ENABLE | 【原厂原装】 | 【2009无铅】 | - |
|
|
N16D1633LPAC2-60C
|
|
1000 | ENABLE | 【原厂原装】 | 【2009无铅】 | - |
|
|
N16D1633LPAC2-60I
|
|
1000 | ENABLE | - | 11+ | - |
|
|
N16D1633LPAC2-60I
|
|
1000 | ENABLE | - | 11+ | - |
|
| 厂商 | 型号 | 描述 | 页数 | 下载 |
|---|---|---|---|---|
TI1 |
N16E | Coaxial Transceiver Interface | 14 页 |
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|
TI1 |
N16E | 9316/DM9316 Synchronous 4-Bit Counters | 12 页 |
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TI1 |
N16E | 9338/DM9338 8-Bit Multiple Port Register | 8 页 |
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TI1 |
N16E | These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic | 10 页 |
|
|
TI1 |
N16E | Quad Latch | 8 页 |
|
|
TI1 |
N16E | Hex TRI-STATE(RM) Inverting Buffers | 8 页 |
|
|
TI1 |
N16E | SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS | 10 页 |
|
FUJITSU |
N16B-0558-B730 | STANDARD Resistive Touch Panel Specification | 7 页 |
|
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FUJITSU |
N16B-0558-B270 | STANDARD Resistive Touch Panel Specification | 7 页 |
|
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FUJITSU |
N16B-0558-B720 | STANDARD Resistive Touch Panel Specification 7-Wire Series | 7 页 |
|
|
FUJITSU |
N16B-0558-B240 | STANDARD Resistive Touch Panel Specification 7-Wire Series | 7 页 |
|
NANOAMP |
N16D1633LPAT2-10I | 512K ? 16 Bits ? 2 Banks Low Power Synchronous DRAM | 27 页 |
|
|
NANOAMP |
N16D1633LPAT2-60I | 512K ? 16 Bits ? 2 Banks Low Power Synchronous DRAM | 27 页 |
|
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NANOAMP |
N16D1618LPAT2-10I | 512K ? 16 Bits ? 2 Banks Low Power Synchronous DRAM | 27 页 |
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NANOAMP |
N16L163WC2CT1-55IL | 16Mb Ultra-Low Power Asynchronous CMOS SRAM 1024K ? 16 bit | 11 页 |
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